Java byte code processor

Key Features

• JavaTM Byte Code compatible
• only 20 Instructions need software assistance
• only two additional Instructions are neccesarry to write low level drivers
• Stack Cache (8-256 words) Stack handling is done by hardware
• 4 GB linear Address Space
• Memory mapped I/O
• 15 Interrupts in up to four Priority Levels
• Support for auto clear Interrupt
• Instruction and Data access can have variable timing
• programmable bus interface 8, 16 or 32 Bit
• Low Power Consumption
• ~25.000 gate equivalents
• 200 MHz @0.25µm

Benefits

• Technology Independent Implementation (Verilog Source Code)
• Verilog Simulation Model
• Synthesis and Testsynthesis Scripts
• Design Support, Netlist Synthesis Service, Layout Service and Consulting available

Deliverables

• Verilog Source Code
• Synthesis script
• Software library for software assisted instructions

Technical Specifications