High-Speed Turbo Product Code decoder
TC3404 is a 2D TPC decoder that is optimised for high-speed.
Overview
TC3404 is a 2D TPC decoder that is optimised for high-speed. A single Core achieves in excess of 200 Mbps user rate with the latest FPGA families (Stratix2, Virtex4). For cost-sensitive application requiring less bitrate, refer to our TC3401 product. For applications reguiring high code gain, refer to our TC30xx family.
Key features
- Best use of FPGA for very high bitrate (up to 230 Mbps user bitrate at 4 iterations).
- Supports all modes of IEEE-802.16a TPCs
- Supports large block sizes (up to 65Kbits).
- Highly programmable
- On-the-fly change of code
- Reduced latency (bank-swapping option)
- Dedicated or micro-controller interface
Benefits
- TC3404 is ideal for applications requiring high-speed (~200 Mbps uer rate) from a single Core.
What’s Included?
- Synthesized FPGA netlist for Altera's or Xilinx's
- Behavioral C-model library
- RTL-model library for Modelsim
- SW executable for test vector generation
- Test bench VHDL source code
- Documentation
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Channel Coding IP cores
What is High-Speed Turbo Product Code decoder?
High-Speed Turbo Product Code decoder is a Channel Coding IP core from TurboConcept listed on Semi IP Hub.
How should engineers evaluate this Channel Coding?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.