DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process
Overview
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process
Technical Specifications
Foundry, Node
UMC 55nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
55nm
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