Vendor: Xilinx, Inc. Category: DMA

AXI BRAM Controller

The AXI BRAM Controller is a soft Xilinx IP core for use with the Xilinx Embedded Development Kit (EDK) and Vivado™ IP Integrator…

Overview

The AXI BRAM Controller is a soft Xilinx IP core for use with the Xilinx Embedded Development Kit (EDK) and Vivado™ IP Integrator (IPI) or available as a stand alone core in the Vivado IP Catalog. The core is designed as an AXI endpoint slave IP for integration with the AXI interconnect and system master devices to communicate to local BRAM. The core supports both single and burst transactions to the BRAM and is optimized for performance.

Key features

  • AXI4 (memory mapped) slave interface
  • Low latency memory controller
  • Separate read and write channel interfaces to utilize dual port FPGA BRAM technology
  • Configurable BRAM data width (32-, 64-, and 128-bit)
  • Supports INCR burst sizes up to 256 data transfers
  • Supports WRAP bursts of 2, 4, 8, and 16 data beats
  • Supports AXI narrow and unaligned write burst transfers
  • Compatible with Xilinx AXI Interconnect
  • Reduced footprint option for AXI4-Lite
  • Supports both Internal and External modes of BRAM block widths

Specifications

Identity

Part Number
AXI BRAM Controller
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA

Learn more about DMA IP core

DMA IP Integration

There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.

Frequently asked questions about DMA IP

What is AXI BRAM Controller?

AXI BRAM Controller is a DMA IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP