SpaceWire link controller with SpaceWire RMAP support and AMBA host interface

Overview

The GRSPW2 core implements a SpaceWire link controller with SpaceWire RMAP support and AMBA host interface.

The GRSPW2 core implements a SpaceWire link controller with RMAP support and AMBA host interface. The core complies to the SpaceWire standard (ECSS-E-ST-50-12C) with the protocol identification extension (ECSS-E-ST-50-51C) and RMAP protocol (ECSS-E-ST-50-52C). Receive and transmit data is autonomously transferred between the SpaceWire Codec and the AMBA AHB bus using DMA transfers. Through the use of receive and transmit descriptors, multiple SpaceWire packets can be received and transmitted without CPU involvement. The GRSPW2 control registers are accessed through an APB interface. For critical space applications, a fault-tolerant (FT) version of GRSPW2 is available with full SEU protection of all RAM blocks.

Key Features

  • Full implementation of SpaceWire standard (ECSS-E-ST-50-12C)
  • Protocol ID extension (ECSS-E-ST-50-51C)
  • Optional RMAP protocol (ECSS-E-ST-50-52C)
  • AMBA AHB back-end with DMA
  • Descriptor-based autonomous multi-packet transfer
  • Low area and high frequency
  • SEU protection fault-tolerance

Benefits

  • Tested and verified against several other SpaceWire cores
  • Low area and high frequency
  • Easily portable between FPGA and ASIC
  • Low-cost project license
  • SEU protection of all RAM blocks (FT version)

Block Diagram

SpaceWire link controller with SpaceWire RMAP support and AMBA host interface Block Diagram

Deliverables

  • Encrypted RTL
  • Stand-alone testbench
  • Optional plug and play interface for GRLIB IP library
  • User's manual

Technical Specifications

Foundry, Node
Any
Maturity
Fully validated on silicon
Availability
Now
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Semiconductor IP