64x8 Bits OTP (One-Time Programmable) IP, UMC 55nm ULP standard CMOS core logic Process

Overview

The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard CMOS core logic process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key Features

Fully compatible with standard 55nm ULP CMOS core logic process
Low voltage: 0.95 V ± 10% read voltage, 1.5 V ± 0.1V program voltage
High speed: 10-µs program time per bit, and 200-ns cycle time read
Wide temperature: from -40°C to 125°C
Built-in fuse protection circuit

Benefits

Small IP size
Low program voltage/current
Low read voltage/current
High reliability
Wide operating temperature
Silicon characterized and qualified

Deliverables

Datasheet
Verilog behavior model and test bench
Timing library
LEF File
Phantom GDSII database

Technical Specifications

Foundry, Node

UMC 55nm ULP standard CMOS core logic Process

Maturity

Silicon Proven & Ready for Production

Availability

Now

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