The 5-bit programmable CMOS low-frequency divider consists of an asynchronous pulse counter, a control logic and a multiplexer that is able to commutate an input signal to output. The block is fabricated on TCMS BiCMOS 0.18 um technology.
5-bit programmable CMOS low-frequency divider
Overview
Key Features
- TCMS BiCMOS 0.18 um
- Continued range of dividing ratio (1…31)
- Low current consumption
- Compact structure
- Portable to other technologies (upon request)
Block Diagram
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Applications
- PLL frequency synthesizer
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Technical Specifications
Foundry, Node
TSMC BiCMOS SiGe 180 nm
Maturity
Silicon proven
Availability
Now
TSMC
Silicon Proven:
180nm
Related IPs
- Programmable 5-bit CMOS low-frequency divider
- Programmable 9-bit CMOS low-frequency divider (5...511 dividing ratio)
- Programmable 9-bit CMOS frequency divider (2…511 dividing ratio)
- Programmable CMOS HF divider (16…4095 dividing ratio)
- Programmable CMOS frequency divider (32...16383 dividing ratio)
- Programmable CMOS frequency divider (56..16383 dividing ratio)