10-bit, 500 MSPS Analog-to-Digital Converter IP block

Overview

The A10B500M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a successive approximation register (SAR) ADC, with 10-bit resolution and a sampling rate of 500 megasamples per second (MSPS).

The A10B500M delivers performance that is unrivaled in the ultra-low power ADC market, with a power consumption of only 1.2 mW, and input bandwidth of 3 GHz.

The cost-effective IP block has been designed and verified for FDSOI processes and validated at 28 nm FDSOI process.

The ADC IP is also available in a radiation-tolerant version, that can function under harsh environmental constraints.

Key Features

10-bit resolution
500 MSPS sampling rate
1.2 mW power
3 GHz Input Bandwidth
Dynamic Performance:

SFDR: 64 dBc
ENOB: 8.9

Hard IP block
STMicroelectronics 28nm process
Verified Design
Radiation-tolerant design available: A10B500MRH

Benefits

Save time-to-market with our ready-to-go complete product solutions for your commercial or radiation tolerant specifications demands. Our IP uses the latest technology nodes for easy integration, or upon request, can be ported to other nodes.
Our IC project teams will become an extension of your system development group, allowing you to focus on your overall end products.

Applications

Automotive Applications:

Autonomous Vehicles
LiDAR systems

High-Speed Communications:

5G, LTE, WiFi

Industrial and Medical applications
Military and Civil Aerospace

Deliverables

Verified Design Report
Layout View (gds2)
Integration Support

Technical Specifications

Foundry, Node

STMicroelectronics, 28nm CMOS FD-SOI

Maturity

Verified Design

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