Leveraging Virtual Platforms for Embedded Software Validation: Part 2
By Andy Ladd, Carbon Design Systems
Embedded.com (06/25/08, 04:16:00 PM EDT)
Earlier in Part 1, we described the benefits of leveraging virtual platforms to validate architecture, performance and embedded software. In this second part, a case study is provided as a means to illustrate the concepts and benefits of using a well-modeled virtual platform of a simple system-on-chip (SoC) design.
The article will discuss how to effectively use interface and abstraction techniques, modeling tools, debugging techniques, and profiling to characterize and validate architectures and embedded software.
Embedded.com (06/25/08, 04:16:00 PM EDT)
Earlier in Part 1, we described the benefits of leveraging virtual platforms to validate architecture, performance and embedded software. In this second part, a case study is provided as a means to illustrate the concepts and benefits of using a well-modeled virtual platform of a simple system-on-chip (SoC) design.
The article will discuss how to effectively use interface and abstraction techniques, modeling tools, debugging techniques, and profiling to characterize and validate architectures and embedded software.
To read the full article, click here
Related Semiconductor IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
Related Articles
- Leveraging virtual hardware platforms for embedded software validation
- Dealing with automotive software complexity with virtual prototyping - Part 3: Embedded software testing
- Processor-In-Loop Simulation: Embedded Software Verification & Validation In Model Based Development
- Fast virtual platforms open up multicore software development
Latest Articles
- ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design
- COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events
- A Reconfigurable Framework for AI-FPGA Agent Integration and Acceleration
- Veri-Sure: A Contract-Aware Multi-Agent Framework with Temporal Tracing and Formal Verification for Correct RTL Code Generation
- FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design