Integrating audio codecs in next-generation SoCs for smartphones and tablets
Carlos Azeredo-Leme, Analog Design Senior Staff, Synopsys Inc. and Craig Zajac, Senior Product Marketing Manager, Synopsys Inc.
EETimes (3/20/2012 1:52 PM EDT)
Integrating audio IP that has been silicon proven and optimized for specific audio functions helps reduce power, area, and cost in today's multimedia system-on-chips (SoCs). As next-generation designs migrate to 28-nanometer (nm) process technologies however, new integration challenges arise. Audio functionality that exists in audio codecs consists mainly of analog circuitry, which does not scale with process technology, and therefore does not follow the traditional Moore's Law.
System architects and SoC designers need to take into consideration how the increased wafer pricing of 28-nm process technologies impacts the economics of incorporating audio codecs into advanced SoCs. Synopsys has performed testing on several mobile multimedia devices available in the market today, finding that most current models of smartphones and tablets can be supported with audio codecs developed in 28-nm.
This article presents the test results and discusses the business and technical challenges of integrating audio functionality into a 28-nm mobile multimedia SoC, while also offering insight on how to overcome those challenges. Some key design considerations are also explained, including scaling limitations, supply voltage requirements and system partitioning options.
To read the full article, click here
Related Semiconductor IP
- Audio CODEC
- 24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - SMIC 55nm
- 24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - SMIC 40nm
- 24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - UMC 55nm
- 24-Bit Stereo Audio Codec ADC, ADC SNR>95dB, DAC SNR>100dB - TSMC 7nm
Related White Papers
- Paving the way for the next generation of audio codec for True Wireless Stereo (TWS) applications - PART 5 : Cutting time to market in a safe and timely manner
- Integrating VESA DSC and MIPI DSI in a System-on-Chip (SoC): Addressing Design Challenges and Leveraging Arasan IP Portfolio
- Audio Validation in Multimedia Systems and its Parameters
- Integrating Ethernet, PCIe, And UCIe For Enhanced Bandwidth And Scalability For AI/HPC Chips
Latest White Papers
- FastPath: A Hybrid Approach for Efficient Hardware Security Verification
- Automotive IP-Cores: Evolution and Future Perspectives
- TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs
- How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
- SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models