Mixed-Signal Designs: The benefits of digital control of analog signal chains
Warren Craddock and Tamara Schmitz, Intersil Corp
EETimes (1/15/2011 12:41 PM EST)
Mixed-signal designs combine the most powerful features and advantages of both analog and digital circuitry. One common mixed-signal architecture is a chain of analog signal blocks, each controlled by digital logic. These designs take advantage of the stability and algorithmic capabilities of digital logic to control traditional analog circuitry.
Because digital logic can be easily modified throughout a design cycle, it is often preferable to keep most of the “intelligence” of a control loop in the digital logic. The analog circuitry should be as simple and direct as possible. Decoders, delays, and other functions should be implemented digitally whenever possible.
Digital logic does not suffer from drift or process variation in the same sense as analog circuitry. Phenomena such as oscillation are much easier to control or prevent entirely. Certain functions – such as control loops that can hold a specific value indefinitely – become very easy to implement in logic. Such circuits are small in area, resistant to noise, and easy to implement.
To read the full article, click here
Related Semiconductor IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
Related Articles
- Time Interleaving of Analog to Digital Converters: Calibration Techniques, Limitations & what to look in Time Interleaved ADC IP prior to licensing
- Signal Integrity --> Diverse IP cranks noise control headaches
- Reuse of Analog Mixed Signal IP for SoC Design: Progress Report (Cadence Design Systems)
- Analog & Mixed Signal IC Debug: A high precision ADC application
Latest Articles
- ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design
- COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events
- A Reconfigurable Framework for AI-FPGA Agent Integration and Acceleration
- Veri-Sure: A Contract-Aware Multi-Agent Framework with Temporal Tracing and Formal Verification for Correct RTL Code Generation
- FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design