Configurable Processors: Ready for Prime Time
By David Fritz, ARC International
The configurable processor has been around for some years, with the promise of improved performance and reduced power consumption and real estate area. But is only recently that its promise has begun to be matched with design and verification tools. David Fritz looks at today’s options.
Click here to read more....
Related Semiconductor IP
- Post-Quantum Digital Signature IP Core
- Compact Embedded RISC-V Processor
- Power-OK Monitor
- RISC-V-Based, Open Source AI Accelerator for the Edge
- Securyzr™ neo Core Platform
Related White Papers
- Reconfigurable processors make move into big time
- Reduce SOC simulation and development time by designing with processors, not gates
- Tuning Fork - A Tool For Optimizing Parallel Configurable Processors
- Configurable processors or RTL -- evaluating the tradeoffs
Latest White Papers
- DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
- ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors
- Practical Considerations of LDPC Decoder Design in Communications Systems
- A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems
- A logically correct SoC design isn’t an optimized design