Tensilica Offers Xtensa Software Development Tools on Linux Platform
Provides Low-Cost Development Environment For Xtensa Configurable Processor Designs
SANTA CLARA, Calif., February 24, 2003 – Tensilica, Inc., the leading provider of configurable and extensible microprocessors, today announced the availability of its full suite of software development tools for the Linux® operating system (OS). The new tools will allow embedded developers that are integrating the Xtensa® processor core into system-on-chip (SOC) designs to take advantage of the low-cost, high-performance benefits of the Linux development environment.
“The powerful features and inherent low cost of the Linux operating system have made it the development platform of choice for many SOC designers,” said Bernie Rosenthal, senior vice president of sales and marketing for Tensilica. “These designers can now have the best of both worlds – a configurable and extensible microprocessor core that reduces design time and complexity plus lets them choose the development platform that they prefer.”
Tensilica’s full development tool suite runs on Red Hat Linux version 7.3, and is available in conjunction with the licensing of Tensilica’s Xtensa processor. The tools include the Tensilica Instruction Extension (TIE) compiler, Xtensa Instruction Set Simulator, Xtensa C/C++ compiler and GNU software development toolchain. Tensilica’s tools also run on Windows NT®/2000 and Sun® Solaris 2.7.
Licensed by over 50 of the industry’s leading semiconductor and systems companies, Tensilica’s patented Xtensa microprocessor technology enables designers to deliver a wide variety of optimized SoCs for applications ranging from low-cost, low-power consumer electronics devices to high performance, multi-processor communications systems. The Xtensa architecture provides a powerful, integrated hardware and software development environment with thousands of configuration options and an unlimited range of customer-specific extensions. Because these instructions are recognized as “native” by a complete set of software development tools, developers can simultaneously tune both application software and processor hardware to meet specific speed, power and feature goals.
About Tensilica
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.
###
Editors’ Notes:
-
“Tensilica” and “Xtensa” are registered trademarks belonging to Tensilica Inc. All other trademarks are the property of their respective holders.
-
Tensilica’s announced licensees are Agilent, Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, IC4IC, Ikanos Communications, JNI Corporation, Marvell, Mindspeed Technologies, National Semiconductor, NEC Networks, NEC Solutions, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., ONEX Communications, OptiX Networks, Osaka & Kyoto Universities, Sony, TranSwitch Corporation, Trebia Networks, Victor Company of Japan (JVC) and ZiLOG.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Industry Leaders Launch RISE to Accelerate the Development of Open Source Software for RISC-V
- SandBox Semiconductor Adds Hybrid Metrology Capabilities to Industry's Leading Physics-based, AI-enabled Process Optimization Platform, Creating the First Software Solution to Holistically Address Process Development Challenges
- OpenHW Group Announces CORE-V CVA6 Platform Project for RISC-V Software Development & Testing
- Espressif Systems Internet of Things WiFi Chips Employ Cadence Tensilica Xtensa Low-Power Processor for Control and DSP
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack