Synaptics Finds Success with Aplus' OTP IP and design services

- San Jose, California - Based in San Jose, California, Synaptics is a leading worldwide developer of custom-designed user interface solutions for mobile computing, communications and entertainment devices. Synaptics products emphasize ease of use, small size, low power consumption, advanced functionality, durability and reliability, making them applicable to a multitude of markets, including notebook computers, PC peripherals, mobile phones, and portable entertainment devices such as MP3 players.

Synaptics' sensing devices need sophisticated computation to convert basic analog capacitive and inductive measurements into pleasing, robust pointing behavior. Synaptics has developed a proprietary microcontroller design that serves as the core of its sensing chips.  In order to create a quality microcontroller that offers low-current consumption and flexibility while maintaining cost-effectiveness, Synaptics embeds an OTP memory block within its proprietary microcontroller. Synaptics approached Aplus in the summer of 2002 looking for a customized OTP IP block for their next product.

Aplus was able to help them define specifications for their memory block, as well as clearly outline how Aplus' memory core would interface with the Synaptics CPU. As with any project, there was constant discussion between both parties to ensure successful integration of Aplus' OTP IP into Synaptics' MCU product. Within a month after finalizing the specification, Aplus was able to deliver a full GDS II database to Synaptics for a 3K x 14 OTP EPROM block designed to UMC's 0.5um 2P2M EPROM process. This block was optimized for size, Vdd range (covering both 3V/5V operation), current consumption (imperative for the handheld devices that Synaptics targeted), as well as production yield.  Aplus was also able to help create the proper testing and programming environment to improve production yields at upon silicon out.

"We really appreciated Aplus' great customer service during that time.  They understood the urgency of the situation and immediately sent engineering staff to our foundry partner in Taiwan - during a holiday, no less! We had pinpointed the problem to be the programming voltage setup of the testers, and Aplus was able to come in and help review process flows and specifications to follow that helped us fine-tune our testing flow. Their CEO even paid a visit to the foundry, showing us that Aplus was serious about resolving the issue. The end result was that we were able to improve the yield on our product, cutting our costs and letting us ramp our production cost-effectively," states Hiten Randhawa, Director of System Silicon Development at Synaptics.

Read more at: http://www.aplusflash.com/News/Syn_cust_test_102104pdf.pdf