Solid State System (3S) Standardizes on Tensilica's Xtensa Processor for Future SOC Development; For Use in High-Volume Consumer Applications
Tensilica(R), Inc., the leading provider of configurable and extensible processors, today announced that Solid State System Co., Ltd., of Hsinchu, Taiwan, popularly called 3S, has licensed the Xtensa(R) processor. 3S plans to standardize on Tensilica's Xtensa processor for future system-on-chip (SOC) development, to fulfill the increasing requirements of configurable and reliable processor's performance from leading consumer applications.
"Tensilica proved that the Xtensa processor could be configured for many demanding applications," stated Jeffrey Lin, President of 3S. "As a leading company of Flash memory controller for a variety of applications, we admire the merits of the flexibility of the Xtensa architecture. We plan to base future SOC development on Xtensa."
"Having a full team in Taiwan allowed us to work closely with 3S even during this challenging time with SARS, travel restrictions and global recession," said Bernie Rosenthal, senior vice president of sales and marketing for Tensilica. "We're very pleased that 3S has chosen our processor for their innovative new consumer products, and we look forward to future designs."
About Solid State System
Solid State System Co., Ltd., is headquartered in Hsinchu, Taiwan. 3S has developed a strong reputation as an innovator and leader in flash disks solutions, particularly the controllers of CompactFlash(TM) cards, and smaller "thumb" sized "key chain" USB storage devices, which it markets under its own name and under OEM relationships for other companies. For more information, visit www.3system.com.tw.
About Tensilica
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.
Related Semiconductor IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
- PDM Receiver/PDM-to-PCM Converter
Related News
- Frontgrade Gaisler Leads the Way in RISC-V Processor Development for Space Applications
- AiM Future Brings GenAI Applications to Mainstream Consumer Devices
- Mirabilis Design Accelerates SoC Development with New System-Level IP Library for Cadence Tensilica Processors
- Tensilica Standardizes on Synopsys' Physical Compiler for Xtensa Configurable Processors
Latest News
- AGI CPU: Arm’s $100B AI Silicon Tightrope Walk Without Undermining Its Licensees
- EnSilica selected for UK CHERI Adoption Collective
- CHIPS Alliance launches the SV Tools Project for open source development of SystemVerilog/UVM codebases
- Socionext Collaborates with Arm to Advance AI Data Center Infrastructure with Arm Total Design
- EDGEAI to Revolutionize Smart Metering with BrainChip Akida 2 License