RISC-V Thrives Through Research, International Collaboration
By Pablo Valerio, EETimes (July 9, 2024)
Munich, Germany — During the recent RISC-V Summit Europe, EE Times had the opportunity to talk to a leading RISC-V researcher Frank Kagan Gürkaynak, a senior scientist at ETH Zürich and a prominent figure within the community. His work underscores the synergy between open-source platforms and industry stakeholders, fostering innovation and overcoming technical challenges.
During the conference, Gürkaynak described how his team could go from design to tape-out of a RISC-V processor in 60 days.
Harnessing open source for commercial success
The open-source nature of RISC-V presents unique advantages for commercial entities. “Tool providers like Synopsys, Rambus, and Micron have been leveraging our open-source repositories for training, benchmarking, and showcasing their technologies,” Gürkaynak said. This eliminates legal hurdles associated with proprietary systems.
Related Semiconductor IP
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- 32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
- All-In-One RISC-V NPU
- ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
Related News
- Breker Verification Systems Readies RISC-V CoreAssurance and SoCReady SystemVIP for Automated, Certification-level RISC-V Verification Coverage
- Andes Technology Showcases Leadership in AI and Automotive Applications at RISC-V Summit Europe 2024
- Ventana CEO to Deliver a Keynote at RISC-V Summit Europe
- ESWIN Computing Pairs SiFive CPU, Imagination GPU and In House NPU in Latest RISC-V Edge Computing SoC
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack