Prosilog demonstrates the integration of the TC4SOC Platform for STMicroelectronics with Magillem as per SPIRIT guidelines
- Prosilog SA, a leading provider of innovative solutions for SoC design and verification, will be demonstrating on its booth #2930 during the next Design Automation Conference in San Diego USA (June 7-11) the integration of ST 's multimedia platform TC4SOC within its Magillem(R) environment.
"STMicroelectronics has been working closely with Prosilog with the common goal to demonstrate that Magillem(R) is the suitable environment to import, integrate IPs and generate a SoC platform compliant to the SPIRIT(*) recommendations," says Dominique Hénoff, Project Design Manager, Consumer & Microcontroller Groups.
"STMicroelectronics is a strong advocate of standardization IP exchange formats. This is why we have jointly initiated the SPIRIT consortium. Our TC4SOC platform is a good driver to demonstrate the capabilities of the EDA tools in that context; we are already very satisfied with the results the Magillem(R) environment from Prosilog is showing."
"Our Magillem(R) environment has been built natively around the XML language which is being standardized through the SPIRIT consortium" says Cyril Spasevski, Magillem(R) Project Manager for Prosilog. With STMicroelectronics collaboration, we have integrated all the IP blocks from the TC4SOC platform; we are able to generate not only the RTL code of the platform but the documentation and register shielding as well."
About Prosilog SA
Prosilog SA is developing innovative RTL & System Level Design EDA tools, as well as soft IP cores, which help SoC designers to reduce the cycle time of their product design. Prosilog SA provides solutions aiming at automating some of the conception and verification phases of SoC design.
The Prosilog's environment for specifying, verifying and implementing complex SoC's, handles system descriptions both at transactional and RTL levels and therefore, facilitates the SoC early architecture exploration phase.
Its graphical front-end, allows the easy integration of different IP blocks, the automatic interface and interconnect generation between IP's as well as the insertion of verification modules.
The IP Creator module enables the fast generation of a VCI, or OCP interface, making it easy to create a common interface for any IP portfolio.
The powerful translators SystemC/HDL and HDL/SystemC offer the necessary connection between both SystemC and HDL worlds.
(*) SPIRIT : Structure for Packaging, Integrating and Re-using IP within Tool flows
Magillem(R) and Nepsys(R) are registered trademarks of Prosilog SA.
All other trademarks are the property of their respective holders.
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- Prosilog releases Magillem V2.2 with Spirit 1.0 IP packaging capabilities
- Prosilog delivers Magillem (R) 2.0 release featuring SystemC transactional support
- Prosilog announces the integration of Yogitech's OCP eVC in Magillem
- Prosilog announces Magillem V3.0 supporting Eclipse platform
Latest News
- How hardware-assisted verification (HAV) transforms EDA workflows
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology