picoChip accelerates WiMAX effort; "future-proofing" technology for next generations of the 802.16 standard
April 9, 2004
- picoChip today announced it is developing a WiMAX PHY library, to run on its picoArray™ processor. The company already has a number of OFDM building blocks, and this development integrates them to deliver an end-to-end solution, enabling OEMs to accelerate their development of cost-effective WiMAX-certified™ systems. This complements the company’s successful reference designs for WCDMA and HSDPA. The standards agility of the picoArray architecture “future-proofs” today’s designs, even as the IEEE 802.16 standard evolves to the more complex ‘d’ and ‘e’ revisions.
Doug Pulley, co-founder and CTO of picoChip said; “Key manufacturers are already using picoArrays in both 3G and WiMAX basestations, but the availability of this library will accelerate the development and deployment of WiMAX compliant systems. What is more, we can deliver upgradeable WiMAX with dramatically better price-performance than traditional architectures, and thus completely replacing DSP and FPGAs.”
Andy Fuertes, Senior Analyst with Visant Strategies and author of the recently published study, “802.16/WiMAX Technologies: World Market Forecasts 2003-2008”, commented: “The 802.16 market could emulate 802.11’s rise as it hits price and performance targets, creating major opportunities for companies. However, it is a complex standard, with three different physical layers, a host of possible configurations (for example, TDD/FDD, channel bandwidth) and a number of optional features. The flexibility in the standard, limited availability of CPE equipment and time-to-market pressure make a software solution highly desirable, especially for the basestation.”
Andy Fuertes concludes: “The picoChip solution will accelerate market acceptance of 802.16 by enabling carriers to deploy early while retaining the ability to upgrade to mobility (802.16e) and full WiMAX compliance later. The solution is effectively an insurance policy against obsolescence and the risks of a rapidly evolving standard and segment.”
The picoArray provides unprecedented flexibility to address evolving standards or the introduction of new features, and it is straightforward to implement IEEE 802.16d (next generation fixed), 802.16e (mobility) or HPI, the Korean broadband wireless standard. This includes trouble-free support for TDD or FDD, increased channel bandwidths, larger FFT sizes, sub-channelisation or new FEC-modes (convolutional turbo-code). It also enables efficient use of multiple antennas at high sample rates, critically important for advanced algorithms such as adaptive antennas, space-time-coding (STC) and MIMO. The system is suited to both basestations and high-end subscriber stations.
The picoArray delivers radical improvements in price / performance and development time. It combines the price and programmability of a traditional DSP with the performance of a FPGA / ASIC. The picoChip PC102 at 160Mhz and 4W delivers performance of 200GIPS, which can include sustained 40 GMACs (Giga multiply accumulates per second, the standard benchmark of DSP performance) - approximately ten times more than a top-of-the-line DSP. For example, an Analog Devices TigerSHARC TS201 @ 600MHz is 4.8GMACs or Texas Instruments’ TMS320C6416 delivers 4.0GMACs at 1GHz. A realistic 20MSPS 256point complex FFT would take less than 5% of the PC102’s capability; while a 2048point transform for OFDMA mode would require just 8%. Similarly, a 100-tap FIR digital filter (say, a 10MHz channel with oversampling) might completely fill a normal DSP or require an FPGA, but uses less than 5% of one picoArray. For error correction (Reed-Solomon+Viterbi) a single PC102 device can very easily decode sustained data rates of >100Mbps, e.g. for multi-carrier basestations, with ample extra capability.
The picoChip WiMAX library compliments the company’s existing reference designs for WCDMA and HSDPA.
More about picoChip WiMax and OFDM solutions.
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- OIF Members Demonstrate How Interoperability Accelerates Solutions for Today's and Future Global Networks at OFC 2022
- Trilinear Technologies Accelerates Innovation in Automotive Display Connectivity with DisplayPort Automotive Extensions Standard (DP AE)
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
- JEDEC Approaches Finalization of HBM4 Standard, Eyes Future Innovations
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations