Panel reviews PDK checklist efforts
Ron Wilson
(08/20/2004 12:00 PM EDT)
SANTA CLARA, Calif. Foundry, EDA and end-user representatives at a conference this week agreed that a supplier group's process design kit effort designed to streamline design is succeeding.
During a panel here during the Fabless Semiconductor Association's Foundry Suppliers' Forum here, the groups PDK) Checklist effort was viewed as a significant step forward.
The checklist is available on the FSA's Web site and is intended to streamline the process by which information flows between the foundries, tool vendors and users. The checklist committee concentrated on the needs of analog and RF designers, these being the most demanding in terms of the detail and sheer number of files necessary to complete a design.
By creating a template that serves as, in effect, a packing list, an index and a table of capabilities and compatibilities, the checklist promised to reduce many of the tedious, often frustrating steps required every time a PDK is delivered from one party to another.
A user can go down the checklist and identify what items are included in the PDK. The items on the list are identified with particular files in the PDK, so endless sorting and searching through the proverbial three-ring binders is avoided.
The checklist was adopted in March. Since then, according to Ken Brock, vice president of marketing at EDA vendor Silvaco International and a key player in the FSA's Checklist effort, several of the eight foundries that participated in the effort have begun delivering a checklist along with their PDKs. The rest are expected to be using the checklist by the end of the year, Brock said.
Several panelists suggested that the checklist could become a first step in evaluating competitive processes. By simply comparing contents, an experienced analog designer could see how much data the foundry was offering. Beyond that, a designer could infer a great deal about what devices were actually available.
"Just knowing there's a file isn't enough," said Paul Kempf, chief marketing and technology officer at high-frequency foundry Jazz Semiconductor. "There are some files in the typical PDK that are very useful, and some that are frankly useless.
"We had a case recently where we were looking at the models in a competitive process and getting incredible results — if the models were to be believed, they were on their way to terahertz performance. But there were a few items missing from the characterization."
Related Semiconductor IP
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
- I2C and SPI Master/Slave Controller
- AHB/AXI4-Lite to AXI4-Stream Bridge
Related News
- Leading Foundries Spur Widespead Adoption of FSA Mixed-Signal/RF PDK Checklist
- FSA Introduces Mixed-Signal/RF PDK Checklist Version 2.0
- TSMC plans to accelerate 0.10-micron efforts for SoC designs, says chairman
- Synopsys steps up efforts in FPGA design tools
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing