NurLogic Further Expands Intellectual Property Offering With Standard Cell and I/O Libraries Utilizing TSMC's Advanced 0.13-Micron Process
NurLogic Further Expands Intellectual Property Offering With Standard Cell and I/O Libraries Utilizing TSMC's Advanced 0.13-Micron Process
SAN DIEGO, March 26 /PRNewswire/ -- NurLogic Design, Inc., a privately held, high-growth, semiconductor technology and intellectual property company, today announced the immediate availability of a family of standard cell and I/O libraries optimized for Taiwan Semiconductor Manufacturing Company's (TSMC) 0.13-micron process technology.
NurLogic's 0.13-micron libraries are designed specifically for TSMC's core CL013G process, which is ideally suited for CPU, communications, portable and wireless system-on-chip (SOC) applications. The TSMC-optimized 0.13-micron libraries will allow customers to significantly reduce design time while enhancing the performance, reliability and flexibility required in the design of today's leading-edge products.
``Designers who are working on leading-edge SOC applications have a clear necessity for fast time-to-market,'' said Kurt Wolf, Director of Marketing for TSMC. ``By offering a broad range of pre-developed standard cell and IP libraries, NurLogic enables these designers to meet their demanding schedules with competitive results.''
NurLogic's standard cell and I/O libraries have been physically and electrically optimized to TSMC's 0.13-micron process and contain more than 1000 specific elements covering an extensive range of functions, including flip-flops, latches and complex cells. NurLogic's test chips were released to TSMC in Q4 2000, with silicon correlation reports expected to be available in early Q2 2001. These high-performance libraries, in conjunction with NurLogic's comprehensive IP product portfolio of memories, analog and connectivity I/Os, enable customers to efficiently develop high-end SOC ASIC designs.
``TSMC recognizes the great importance in pre-developing IP for the company's advanced technology,'' said Darla Berkel, Sr. Product Marketing Manager NurLogic. ``We believe TSMC has taken a leadership role by contracting NurLogic to ensure that high performance libraries are available now. We look forward to building upon the strength of our well-established relationship with TSMC as we continue to extend our product offering.''
NurLogic will also offer additional high-speed, high-density low voltage (CL013LV) libraries in Q2 2001.
AVAILABILITY
NurLogic's industry standard cell and I/O libraries for the TSMC 0.13-micron process are available immediately. For pricing information, please contact NurLogic at 1-877-NURLOGIC.
ABOUT TSMC
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology, library and IP options and other leading-edge foundry services. TSMC operates two six-inch wafer fabs and six eight-inch wafer fabs. The Company also has substantial capacity commitments at two joint ventures fabs (Vanguard and SSMC) and WaferTech. In 2000, TSMC produced the foundry industry's first 300mm customer wafers and began constructing two dedicated 300mm fabs. TSMC's corporate headquarters are in Hsin-Chu, Taiwan. More information about TSMC is available through the World Wide Web at http://www.tsmc.com.
ABOUT NURLOGIC DESIGN, INC.
NurLogic Design, Inc. provides a broad range of semiconductor technology products to leading companies in the networking and communications industries. NurLogic products are targeted at CMOS and silicon germanium technologies, and include high speed connectivity IP, analog and mixed-signal IP, embedded memory cores, foundation IP, and ASIC and ASSP products. NurLogic is a privately held corporation headquartered at 9710 Scranton Road, Suite 380, San Diego, CA 92121. Further information on NurLogic can be found on the web at www.nurlogic.com or by calling 1-877-NURLOGIC.
All other trademarks are the property of their respective owners.
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- Micron and Intellectual Ventures Sign Intellectual Property License Agreement
- Taiwan's Intellectual Property and Commercial Court Announced Its Ruling on UMC and Other Defendants with Respect to Micron Case
- Mentor Graphics Releases Serial ATA PHY Intellectual Property for SMIC 130 Nanometer Generic Process
- M31 Launches ONFi5.1 I/O IP on TSMC 5nm Process
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations