National Taiwan University and Altera Corporation Establish EDA/SOPC Joint Laboratory
San Jose, Calif., June 26, 2007—Altera Corporation (NASDAQ: ALTR) today announced the opening of the EDA/SOPC Joint Laboratory at National Taiwan University. As part of Altera’s worldwide University Program, the joint laboratory is equipped with FPGA development boards, Quartus® II design software, Nios® II embedded processors and Altera® MegaCore® intellectual property. The laboratory provides the best hands-on educational experience for professors, instructors, and students, enabling engineering students to build their expertise in FPGA design methodology and enhance their opportunity for success in the increasingly competitive global electronics marketplace.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Complex Digital Up Converter
- Bluetooth Low Energy 6.0 Digital IP
- Verification IP for Ultra Ethernet (UEC)
- MIPI SWI3S Manager Core IP
Related News
- SMIC and JCET Establish a Joint Venture in Jiangyin National High-Tech Industrial Development Zone
- Tensilica and CSIP of Ministry of Information Industry (MII) of PRC Establish First Joint IP Core Lab
- Lawrence Berkeley National Laboratory and Tensilica Collaborate on Design of Energy-Efficient Supercomputing for Climate Research
- SMIC, Brite, and Zhejiang University Found Joint IC Research Program
Latest News
- Avnu Alliance Launches Aerospace Task Group to Accelerate TSN Adoption in the Aerospace Industry
- CFX’s 40nm HV Process OTP IP Now Available at Fab
- EdgeCortix Completes Initial Close of Series B Financing, Driving Total Funding to Nearly $100 Million USD
- GlobalFoundries Completes Acquisition of MIPS
- Infineon successfully completes acquisition of Marvell's Automotive Ethernet business