Matsushita readies SoC as HDTV platform

Matsushita readies SoC as HDTV platform
By Yoshiko Hara,
July 12, 2002 (11:09 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020712S0035

TOKYO — Matsushita Electric Industrial Co. Ltd. has developed a system-on-chip, fabricated on 0.13-micron CMOS with six-layer copper, as a platform for high-definition digital TV systems.

"Design and development of high-definition TVs has become increasingly complex and requires time and resources. We want to establish a platform on which we can design products more efficiently to speed time-to-market," said Susumu Koike, president of Matsushita Semiconductor Co.

Matsushita developed its first-generation SoC for digital TVs back in 1997. "With accumulated know-how and intellectual properties, design efficiency is improving," Koike said.

The new MN2WS0010 SO SoC integrates all back-end-processing function blocks, including the transport decoder, microprocessor, graphics engine and MPEG-2 decoder. The one-chip approach contrasts with Matsushita's conventional platform for high-definition TV, which places a six-piece chip s et on two printed-circuit boards.

Using the new SoC as the core, customers can design TV sets ranging from modestly priced units to high-end sets, altering functionality by manipulating the number of external memory devices, the CPU clock frequency and the peripheral devices. The system-on-chip can be configured to support various global TV formats and MPEG-4 video playback simply by changing the processor software.

The chip's fabrication on a 0.13-micron CMOS process with six-layer copper wiring is a first for consumer electronics, said Kazumi Kawashima, director of Matsushita Semiconductor Co.'s Consumer Electronics System LSI Development Center.

Shared process, original design

In December 1998, Matsushita and Mitsubishi Electric Corp. joined forces in a five-year development project for system-on-chip process technology at 0.15 micron, 0.13 micron and beyond. "The resulting technology is the basis of this LSI, but the design is completely original to Matsushita ," said Koike.

The chip's 35 million transistors include a proprietary 32-bit microprocessor, the AM-34, with a maximum 400-MHz clock frequency; a transport decoder that handles three streams; and a high-definition audio/video decoder using a proprietary media core processor. The system-on-chip is packaged in 27-mm², 485-pin ball grid array.

The chip will be manufactured at Matsushita's recently completed fabrication facility in Arai, Japan. Construction of the fab began in May 2000 and cost about $770 million. The fab is equipped for 0.13-micron process technology, extensible to 0.1 micron, with a capacity of 5,000 8-inch wafers per month. It started operation in April.

The part is Matsushita's third-generation HDTV chip. "We want to foster the platform as a global standard for HDTV core systems. We are going to promote this chip in the United States after its introduction to the Japanese market," Koike said. Samples will be available in August at a price of about $170.< /FONT>