LeWiz Open Source LVDS Transceiver Design
Analog design is difficult and time consuming. Less and less engineers pursue this field.
November 23, 2023 -- High speed transceiver circuits are analog. Their designs require specialized knowledge and transistor-level tuning for specific silicon process. High speed transceivers are used in many areas. Examples of these are Ethernet networking, communication channel interfaces, bus interfaces, and others. They are also used for inter-chip connectivity such as from A/D converter to FPGA/processing chip or from Ethernet MAC to PHY devices. They help to reduce the number of signals required for connecting from 1 chiplet to another in multi-chip modules. If you're using a USB device, you're using a high-speed transceiver.
Low-voltage differential signaling (LVDS) circuits are a class of high-speed transceivers. To help advancing the industry in this area, today LeWiz Communications open-source the LVDS transceiver design for the open-source Skywater 130nm silicon process. This design has been tuned for up to 1 Giga bit per second speed. Its databases are available at: https://github.com/lewiz-support/LVDS_Transceiver/tree/main
This design uses open-source tools, libraries, and low-cost silicon process. Its advantages include: Driving capability up to 10 meters, good eye opening/good immunity to noise, has low off-set and unbalanced differential output voltages.
Previously, LeWiz released to open source 3 Ethernet MAC cores supporting up to 100Gbps speed. This open-source transceiver is the first to complement those cores. The open-source technologies are released with Apache 2.0 license - free of licensing or royalty fee with source code/designs available to designers. We hope you will use and contribute to open-source further advancing this technology.
LeWiz Communications, Inc. develops extensive networking solutions for use in aerospace, datacenters and embedded products including advanced time-trigger Ethernet, time-sensitive networking technologies, eFPGA and radiation hardened electronics in GF 12LP and Skywater RH90 silicon processes. Further information are available at www.LeWiz.com.
Related Semiconductor IP
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- LVDS Transceiver in TSMC 28nm
- GF12 - 0.8V LVDS Rad-Hard Transceiver in GF 12nm
- High-speed LVDS (Low-Voltage Differential Signaling) transceiver
- LVDS Transceiver
Related News
- LeWiz released RISC-V with OmniXtend clustering technology to open source.
- Linux Foundation to Host CHIPS Alliance Project to Propel Industry Innovation Through Open Source Chip and SoC Design
- Data Centers Open Source Silicon
- Imperas and Metrics Collaborate to Jump Start RISC-V Core Design Verification Using Open Source Instruction Stream Generator
Latest News
- SPARK Microsystems’ SR1120 UWB Transceiver Outperforms Bluetooth by 40X for Wireless Data Throughput
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
- Unlocking High-Speed Connectivity with Certus Semiconductor’s LVDS Transceiver on GlobalFoundries 12LP/LP+
- Faraday Reports First Quarter 2025 Results
- Quadric’s Chimera GPNPU Named Best Edge AI Processor IP by Edge AI and Vision Alliance