IDE for 8-bit RISC rolls; Altera tips PCI cores

IDE for 8-bit RISC rolls; Altera tips PCI cores
By Michael Santarini, EE Times
January 19, 1999 (4:27 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990119S0019

VAutomation Inc. (Nashua, N.H.) has announced an integrated development environment (IDE) for its 8-bit, V8-uRISC processor core.

The IDE includes software-development tools for each stage of the design cycle. It has an on-chip debugger, DeICE, for in-system software testing and debugging, a C compiler, assembler, software simulator and development system.

DeICE uses JTAG-based techniques to provide control over and visibility into the embedded processor core, according to the company. It consists of a PC-based graphical user interface and a JTAG master controller board that interfaces to a JTAG slave controller embedded in the processor core.

According to the company, DeICE features include the ability to start, stop and reset the processor; execute a single clock, instruction, subroutine or C statement; set a breakpoint on specified bus activity; and examine and change the program coun ter, register values and RAM contents. DeICE adds 3,000 gates and four pins to the final silicon.

The C Compiler was developed by Hi-Tech Software (Alderley, Australia). The ANSI-compliant tool supports all standard data types and comes in DOS and Sun versions.

The software simulator is a Win32 application that loads and executes an Intel hex file generated by the C compiler or assembler. It provides a high-speed simulation and debugging environment to debug V8-uRISC software before the core has been implemented in silicon.

The IntelliCore Prototyping System is used to evaluate the V8-uRISC for the intended application. It allows designers to begin software testing and hardware/software integration prior to the availability of first silicon. This FPGA-based system includes a Xilinx or Altera device for prototyping, along with an array of memory and I/O resources that let it approximate the intended application.

The V8-uRISC assembler and simulator are provided free at http://www.vautomation.com. The C Compiler, priced at $2,000, is available from VAutomation or Hi-Tech. The DeICE debugger and IntelliCore Prototyping System are $1,495 each. The V8-uRISC microprocessor core is available at $45,000 for a royalty-free project license.

Now that its FLEX 10KE family of devices has achieved 64-bit, 66-MHz PCI performance, PLD vendor Altera Corp. (San Jose, Calif.) has announced two cores it claims are 100 percent compliant with PCI Rev. 2.1 specification.

Altera developed one of the cores, a PCI/C master/target, in house and is offering it to beta-site customers. The other PCI core is the work of PLD Applications, a member of the Altera Megafunction Partners Program.

The Altera core is expected to be available in March with a price tag of $14,995. The company also wil l offer a development kit, priced at $4,995, that includes a FLEX 10KE device, prototype board and software drivers.

PLD Applications' 64-bit, 66-MHz PCI core is available now for $16,990 and includes a PCI gate-level net-list, target .acf files, software drivers and one year of maintenance. The company offers prototyping hardware and software as well as consulting and training for an additional fee.