Allegro DVT showcases its HEVC/H.265 Video Decoder IP at Mobile World Congress 2013
Grenoble, France -- February 21, 2013 --HEVC (aka “High Efficiency Video Coding”) is the next generation video standard, developed by the JCT-VC team. JCT-VC is a joint team between MPEG and VCEG. The HEVC standard, finalized in January 2013, will bring 50% bitrate savings compared to equivalent H.264/AVC encodings.
At the Mobile World Congress, Allegro DVT will present on its booth:
HEVC/H.265 Hardware Decoding IP, the world first HEVC/H.265 hardware decoder IP, based on an unprecedented multi-core architecture. This gives our implementation the following key competitive advantages:
- support decoding of 4K resolutions at 60 Hz and beyond.
- target decoding performance is met at a lower operating frequency, allowing a high level of power savings, critical to mobile applications.
- the multi-core architecture doesn’t add any constraints on the encoders such as slicing or tiling pictures, which prevents adding artifacts and allows the best possible video quality.
H.264 Hardware Encoding & Codec IPs, with best-in-class video quality, minimized silicon area, optimized power consumption and an ultra-low end-to-end latency for Miracast support.
WiGig WDE Codec IP, the most advanced Wireless Display Extension (WDE) codec for next generation 60 GHz wireless technology: 802.11 ad/WiGig.
HEVC/H.265 Compliance Streams, provide HEVC/H.265 decoder manufacturers with the perfect tool for validating their developments, and ensure compliance with this upcoming video standard.
Please come and book a private demonstration at the Mobile World Congress 2013, Hall 5, booth 8 and 9 of the French Pavilion (#5E100).
Allegro DVT is a leading provider of H.264/MPEG-4 AVC|SVC|MVC and HEVC/H.265 solutions, including industry standard compliance test suites, H.264/MPEG-4 AVC and HEVC/H.265 encoder, codec and decoder hardware (RTL) IPs; and multiscreen encoders and transcoders. Allegro DVT products have been chosen by more than 100 major IC providers, OEMs and broadcasters. For more information, visit Allegro DVT's Website Allegro DVT's Website or contact info@allegrodvt.com.
Related Semiconductor IP
- USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
- FH-OFDM Modem
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
- USB Full Speed Transceiver
Related News
- SmartDV Introduces Advanced H.264 and H.265 Video Encoder and Decoder IP
- Chips&Media Licenses HEVC/H.265 Decoder Core to a Leading Fabless Semiconductor Company
- Live demonstration of Allegro DVT's HEVC/H.265 Main10 video decoder IP at IBC 2013
- HEVC/H.265 4K decoder IP & compliance streams, by Allegro DVT, at ARM TechCon'13
Latest News
- UMC Reports Sales for June 2025
- Codasip Faces Sale – Pivotal Moment for EU RISC-V Sovereignty
- Synopsys Issues Statement in Connection to the Lifting of Recent U.S. Export Restrictions Related to China
- Consumer-Tech Brand, Nothing, Taps Ceva’s RealSpace Software to Bring Immersive Spatial Audio to Headphones and Earbuds
- Tenstorrent Acquires Blue Cheetah Analog Design