Examining the Top Five Fallacies About RISC-V
By David Patterson, RISC-V International
EETimes (December 13, 2022)
In a little over a decade, RISC-V has arguably become at least the third most important instruction set architecture (ISA) for future applications of computing. In the next few years, it may become just as surprising to pick a proprietary ISA over the open RISC-V for a new project as it would be to pick a closed alternative to Ethernet or USB.
My colleagues at UC Berkeley and I predict that by the end of this decade, the dominant ISA for future product development will be the open RISC-V architecture. Companies around the world are already designing with RISC-V and the momentum is rapidly increasing, so this is a good time for the industry to take a closer look at RISC-V and examine some fallacies about it.
To read the full article, click here
Related Semiconductor IP
- SHA-256 Secure Hash Algorithm IP Core
- EdDSA Curve25519 signature generation engine
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
Related News
- Gartner Says Chinese Smartphone Vendors Were Only Vendors in the Global Top Five to Increase Sales in the Third Quarter of 2016
- Global Top Ten IC Design Companies for 2Q19 Ranked by Revenue Released, with Top Five Registering Revenue Fall, Says TrendForce
- Top Five Wafer Capacity Leaders Raise Share of Global Capacity to 54%
- Top Five Leaders Continue Expanding Share of Global IC Fab Capacity
Latest News
- SiMa.ai Secures Strategic Investment from Micron to Scale High-Performance, Power-Efficient Physical AI
- Codasip announces strategic pivot and divestiture
- UMC Reports Sales for March 2026
- Semidynamics Secures a Strategic Investment to Advance Memory-Centric AI Inference Chips
- Ultra Accelerator Link™ (UALink™) Consortium Publishes Four Specifications Defining In-Network Compute, Chiplets, Manageability and 200G Performance