EnSilica cuts post-quantum cryptography (PQC) silicon area with three-in-one IP block
Oxford, UK -- July 21, 2025 -- EnSilica, a leading maker of mixed-signal ASICs (Application Specific Integrated Circuits), has developed a combined hardware IP block supporting the full CRYSTALS post-quantum cryptography (PQC) suite, saving silicon area, power and cost. The licensable eSi-CRYSTALS PQC accelerator runs Dilithium (FIPS-204), Kyber (FIPS-203) and SHA-3 (FIPS-202) algorithms, which previously required three separate IP blocks.
In August 2024, the US National Institute of Standards and Technology (NIST) released the first three finalised PQC standards, with additional algorithms announced or in draft stages. Dilithium, Kyber, and SHA-3 are advanced cryptographic algorithms designed to secure digital systems against both classical and quantum computing threats. Dilithium is used for digital signatures, providing authentication and data integrity, while Kyber is a key encapsulation mechanism that enables secure key exchange. Integrated into the block is also a hardware-optimised implementation of the cryptographic SHA-3 hash function that creates a digital fingerprint of data allowing for robust integrity verification. Together, these algorithms form the foundation for quantum-resistant security in modern systems, ensuring long-term protection of sensitive information.
Ian Lankshear, CEO of EnSilica, commented: “The emerging PQC threat is not just theoretical. Security analysts warn that adversaries can already capture encrypted data today, with the intention of decrypting it in the future when quantum capabilities become available, a tactic known as ‘harvest now, decrypt later’. The implications are profound for those relying on today’s cryptographic schemes, which is why EnSilica’s PQC offering delivers future-proof hardware protection at the silicon level with minimal silicon area for mature and advanced technology nodes.”
EnSilica previously announced separate Dilithium, Kyber and SHA-3 algorithms licensed for use by a major semiconductor company for a 5 nm networking ASIC. The new IP offers a more compact implementation than separate cores. EnSilica also has a full suite of classical cryptographic accelerators including ECC, ECDSA, RSA, AES, ChaCha20, and Poly1305. In addition, the company offers a NIST-compliant true random number generator (TRNG).
Related Semiconductor IP
- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
- CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
- CRYSTALS Kyber core for accelerating NIST FIPS 203 Key Encapsulation Mechanism
- Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
- PUF-based Post-Quantum Cryptography (PQC) Solution
Related News
- Crypto Quantique upgrades QuarkLink IoT device security platform for post-quantum cryptography (PQC)
- Post-Quantum Cryptography Coalition Unveils PQC Migration Roadmap
- CAST Expands Security IP Line with New Family of Post-Quantum Cryptography Cores
- PQSecure Joins the Post-Quantum Cryptography Coalition (PQCC)
Latest News
- Access Advance Extends HEVC Advance Rate Increase Deadline
- Lightmatter and Cadence Collaborate to Accelerate Optical Interconnect for AI Infrastructure
- Lightmatter Collaborates with Synopsys to Integrate Advanced Interface IP with Its Passage Co-Packaged Optics Platform
- Lightmatter and GUC Partner to Produce Co-Packaged Optics (CPO) Solutions for AI Hyperscalers
- Q4 2025 RF Front-End IP: Stable Leaders, China Accelerates, Lansus Enters Top Five, Filters Dominate