Stellamar Introduces New Performance Line of its Digital ADC Technology
December 7, 2010 -- Chandler, AZ - Stellamar has announced its new performance line of Digital ADCs. This follows on the heels of their first announcement, which unveiled the revolutionary design of ADCs using digital library cells instead of complex analog blocks. This permits Digital ADCs to be easily integrated in digital CMOS processes without requiring any special processing steps typical of the analog designs. Now, Stellamar is making headway into higher performance capabilities of up to 14 bit resolution and 500Hz bandwidth. “This new line demonstrates Stellamar’s commitment to continuous innovation and improvement,” says CEO Allan Chin. “It shows we are responding to the needs of customers.” Previously announced 12 bit, 4 kHz and 15 kHz bandwidth ADCs are now available on our Audio Evaluation board.
The new performance line adheres to all of the same benefits as the initial design. It eliminates most of the problems encountered in the integration of traditional ADCs and dramatically reduces the design cycle time in some cases by as much as 90%, risks up to 99% and cost up to 50%. Both ASICs and FPGAs can benefit from this technology: since analog blocks are not needed, the Digital ADC can be implemented in pure digital processes. Costly external ADCs are no longer necessary and less board space is needed.
Stellamar’s Digital ADCs have several advantages compared to traditional ADCs with equivalent performance. In particular they require on average 68% smaller silicon area, consume 50% less power on average, and can operate with lower supply voltages. These features make them ideal candidates for portable applications.
The ADC design is process technology independent, requires only digital layout and testing is performed by digital testers. All of this results in tremendous resource, time and cost savings.
Since Digital ADCs are characterized by extremely low drifts and their performance depends mainly on digital components, precision measurement devices will benefit from them. Furthermore, the Digital ADCs can be easily implemented with Rad-Hard digital technologies for military, space and avionics applications.
View the factsheet and for more product information please email info@stellamar.com.
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
Related News
- Cutting-edge 18-bit 100dB Stereo Audio ADC IP Core proven in 28nm Silicon, Offering Unmatched Audio Signal Processing Capabilities is available for immediate Licensing into Audio Chipsets, Digital Cameras, and Automotive Applications
- Nordic launches industry's highest integration low voltage supply, long-range 430-928MHz transceiver family with embedded MCU and ADC
- ChipIdea announces the silicon validation of CI3261Ba, a dual 12-bit 50MS/s pipeline ADC
- ChipIdea announces the silicon validation of CI3350hf, a Dual 8 Bit 105MHz Pipeline ADC
Latest News
- How CXL 3.1 and PCIe 6.2 are Redefining Compute Efficiency
- Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems
- Automotive Industry Charts New Course with RISC-V
- Xiphera Partners with Siemens Cre8Ventures to Strengthen Automotive Security and Support EU Chips Act Sovereignty Goals
- NY CREATES and Fraunhofer Institute Announce Joint Development Agreement to Advance Memory Devices at the 300mm Wafer Scale