Commentary: Lower test costs start with IC design
(11/23/2006 9:00 AM EST), EE Times
What do cost of test and weather have in common? To paraphrase Mark Twain, it seems like everybody talks about it, but nobody does anything about it. We can't do much about the weather but we can do something about test costs.
A few semiconductor industry leaders have figured out how to contain this problem by attacking test costs at the source — at the chip design level. But this perspective on cost reduction requires such a great degree of both creative thinking and corporate resolve that many businesses may find it challenging to create the necessary motivational changes to reap the reward.
Everybody agrees that cost of test is rising. At the recent International Test Conference (ITC) in Santa Clara California, Nvidia Corp.'s Chris Malachowsky said that test accounts for about 4-5 percent of the manufacturing cost. In addition, he said, yield costs, which include the costs for final testing and packaging, add an additional 5.5 percent to the total cost.
To read the full article, click here
Related Semiconductor IP
- MIPI SoundWire I3S Peripheral IP
- MIPI SoundWire I3S Manager IP
- eDP 2.0 Verification IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- LLM AI IP Core
Related News
- Commentary: More chip makers going 'fabless' to lower costs
- Commentary: Developers Look Set to increase FPGA IP Costs
- Synopsys Advances Test Fusion Technology with Test Points to Reduce Manufacturing Costs and Boost Quality
- Global Top 10 IC Design Houses See 49% YoY Growth in 2024, NVIDIA Commands Half the Market, Says TrendForce
Latest News
- Ceva and embedUR systems Partner to Launch ModelNova for NeuPro NPU Family, Expanding Edge AI Model Ecosystem
- Faraday Reports Third Quarter 2025 Results
- POLYN Technology Announces First Silicon-Implemented NASP™ Chip
- FortifyIQ Secures the Quantum Era with Over-the-Air Updatable Cryptography
- Cadence Reports Third Quarter 2025 Financial Results