Chip Heads Gauge Silicon Roadmap
AMD, ARM, Intel review Moore's law and more
Rick Merritt, EETimes
2/1/2018 04:01 PM EST
SANTA CLARA, Calif. — Whether Moore’s law is dead or alive, the semiconductor roadmap leads to both big challenges and opportunities, according to a panel of technologists from AMD, ARM, and Intel at the DesignCon event here.
Speakers were split over whether the number of transistors on a chip is continuing to double every two years as Intel co-founder Gordon Moore observed in 1965. “There’s at least a slowing of node transitions,” said Rob Aitken, a fellow and director of technology at ARM, noting both a three-year span between 16-nm and 10-nm production and the power advantages of “Denard scaling stopped at 90 nm for the kinds of circuits we deal with.”
Intel’s research provides a “five-year process horizon so our internal roadmap is to 5 nm, and we don’t see [Moore’s law] ending in that time,” said Rory McInerney, vice president of Intel’s platform engineering group and director of its server development group.
To read the full article, click here
Related Semiconductor IP
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
Related News
- Crypto Quantique partners with silicon IP distributors across Asia to deliver quantum-driven chip security
- Sondrel announces Advanced Modelling Process for AI chip designs
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- HPC customer engages Sondrel for high end chip design
Latest News
- EnSilica to develop quantum-resilient secure processor chip for critical national infrastructure applications backed by £5m UK Government ‘Contract for Innovation’
- CAST Introduces JPEG XL Encoder IP Core for High- Quality, On-Camera Still-Image Compression
- PGC Strengthens Cloud and AI ASIC Acceleration with Synopsys’ Next-Generation Interface and Memory IP on Advanced Nodes
- IntelPro Licenses Ceva Wi-Fi 6 and Bluetooth 5 IPs to Launch AIoT Matter-Ready SoCs
- VeriSilicon and Google Jointly Launch Open-Source Coral NPU IP