Certus releases radiation-hardened I/O Library in GlobalFoundries 12nm LP/LP+
January 29, 2025 -- Certus Semiconductor is pleased to announce that it has begun 2025 with the delivery of a radiation-hardened by design I/O library in GlobalFoundries 12nm LP/LP+ technology to a tier one customer. This design incorporates silicon-proven ESD that had been delivered previously to another tier one customer. The library includes a 1.8V and 3.3V GPIO with multiple drive strengths, along with a full-speed output enable function. The library includes an optional LDO to generate an internal reference for 3.3V Operation, as an alternative to an external 1.8V supply.
The silicon-proven ESD cells have been proven up to 64MeV proton test and Heavy ION SEE (LET 85) Testing and are currently in production in a separate product line. A fail-safe GPI allows user to interface with bus-type protocols like GMII in a radiation environment. Certus is excited for this IP to go to production later this year!
Related Semiconductor IP
- 1.8V and 3.3V Radiation-Hardened GPIOs with Optimized LDO in GF 12nm LP/LP+
- Full Radiation-Hardened ESD Library in GF 12nm LP/LP+
- Radiation-Hardened eFPGA
Related News
- Certus Semiconductor releases ESD library in GlobalFoundries 12nm Finfet process
- Certus Semiconductor releases I/O library in TowerJazz's 65nm process
- Krivi announces availability of 28nm UMC IO Pad library platform
- BAE Systems collaborates with GlobalFoundries to produce radiation-hardened single board computers for space
Latest News
- TeraSignal Demonstrates Interoperability with Synopsys 112G Ethernet PHY IP for High-Speed Linear Optics Connectivity
- Quadric Opens Subsidiary in Japan with Industry Veteran Jan Goodsell as President
- XConn Technologies Achieves PCI-SIG® Compliance for PCIe® 5.0 Capable Switch
- intoPIX and Nextera-Adeas Announce Latest IPMX Demo Design with JPEG XS on Compact FPGAs at ISE 2025
- Certus releases radiation-hardened I/O Library in GlobalFoundries 12nm LP/LP+