CAST IP Core Simplifies Smart Card Reader Integration
May 20, 2004 (IP Japan) Shinagawa, Japan — Semiconductor intellectual property (IP) provider CAST, Inc. today announced a new IP core that implements a Smart Card Reader interface and controller.
Smart cards embed a computer chip in a credit-card sized plastic card, and are gaining global popularity for personal identification, mobile phone personalization, credit/debit functions, satellite TV security, health care records storage, and other applications. The new CAST SCR-APB core acts as a communication controller, passing data between the host system and the smart card. It supports industry-standard specifications (SO/IEC 7816-3:1997[E] and EMV'96 3.1.1) and provides an interface to host systems using the popular AMBA™ Advanced Peripheral Bus (APB).
The SCR-APB is fully featured, and can activate and deactivate cards, execute cold/warm resets, handle ATR response reception, and perform other essential functions. Designed for ASIC or FPGA implementation, it produces efficient results, requiring for example just 6,500 ASIC gates (TSMC 0.13).
The SCR-APB core is available now; royalty-free pricing varies by configuration, and customers should contact CAST for details.
About CAST, Inc.
CAST provides nearly 100 different popular and standards-based cores including processors, interfaces, and application-specific functions for multimedia and encryption. ASIC, FPGA, and System-on-Chip (SoC) designers use these cores to significantly shorten their development time and reduce their overall costs.
The company has about 200 customers developing products in nearly every applications area. Privately owned and operating since 1993 with a focus on making IP practical and affordable, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City, has a European office in the UK, and works with an international network of IP developers and distributors.
Related Semiconductor IP
- HBM4 PHY IP
- Secure Storage Solution for OTP IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- VIP for Compute Express Link (CXL)
Related News
- Lossless Data Compression Webinar: Choosing Algorithms and IP Core Accelerators
- RANiX Employs Time-Sensitive Networking IP Core from CAST in Advanced Automotive Antenna System
- CAST Expands Security IP Portfolio with High Performance SM4 Cipher Core
- CAST Simplifies RISC-V Embedded Processor IP Adoption with New Catalyst Program
Latest News
- BAE Systems Licenses Time Sensitive Networking (TSN) Ethernet IP Cores from CAST
- HBM4 Mass Production Delayed to End of 1Q26 By Spec Upgrades and Nvidia Strategy Adjustments
- ASICLAND Secures USD 17.6 Million Storage Controller Mass Production Contract
- TSMC to Lead Rivals at 2-nm Node, Analysts Say
- Energy-efficient RF power modules developed using SOI technology