CAST Launches Multi-Channel DMA IP Core Ideal for Streaming Applications

Configurable, streaming-optimized controller efficiently transfers large volumes of data to and from system memory and peripherals over 16 channels in each direction.

Woodcliff Lake, New Jersey — June 19, 2025 — Semiconductor intellectual property core provider CAST has introduced a new direct memory access (DMA) IP core that alleviates a system’s host CPU from the resource-intensive task of managing data transfers between system memory and multiple peripherals with streaming interfaces.

The new MC-SDMA Multi-Channel Streaming DMA Controller is designed to be more resource- and bandwidth-efficient than most competing products. It can simultaneously manage up to 32 channels—16 incoming and 16 outgoing between host memory and peripherals—using a data bus width from 32 to 1024 bits. Memory-to-memory transfers via streaming interface loopback is available for embedded systems, while other advanced features facilitate the fast transfer of large amounts of data including highly configurable channel-specific descriptors for programmable control of complex data transfers, split transfers, interleaving, and TLAST/TUSER bus handling.

Even with these extensive capabilities, the core is easier to integrate and use than similar DMAs. Numerous configurable synthesis and runtime parameters enable easy tailoring of the DMA controller to specific application requirements. The core uses standard AMBA® interfaces to access system memory and configuration and status registers (CSRs), and its built-in AXI-Stream manager/subordinate interfaces eliminate the need for external interface bridges. Comprehensive deliverables—including a UVM testbench, bit-accurate software model, IP-XACT register files, and simulation and synthesis scripts—ease verification and enable rapid deployment.

“CAST’s experience with DMA controllers goes back to an 8237 core 25 years ago, and we’re proud to apply that extensive know-how to this excellent new solution for big data streaming,” said Evan Price, product manager for peripherals IP."

The MC-SDMA Core is especially well suited to systems that must move large amounts of data quickly through concurrent bidirectional data flows, potentially with real-time, deterministic transfer timing. Examples include simultaneous front and rear camera views in an automobile, networking equipment capable of handling high-throughput packet processing, multimedia video streaming or an image processing pipeline for multimedia products, and data-intensive AI and machine learning accelerators that need fast buffer transfers. Available functional safety options—checksum computation and FIFO/CSR parity protection—help make the core suitable for safety-critical automotive, industrial, and aerospace use cases.

Developed by CAST’s expert IP engineering team, the new MC-SDA core is available now for ASICs (synthesizable SystemVerilog) or targeted netlists for FPGA devices from all popular providers. Flexible licensing terms are available—including royalty-free—and the core is backed by CAST’s industry-leading customer support before and after your purchase. Learn more by contacting CAST sales or visiting the CAST DMA Controller Cores overview.