Axis' Xtreme gets behavioral boost

Axis' Xtreme gets behavioral boost

EETimes

Axis' Xtreme gets behavioral boost
By Michael Santarini, EE Times
October 18, 2001 (1:53 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011018S0053

SAN MATEO, Calif. — Axis Systems Inc. has added technology it calls a behavioral processor to its Xtreme acceleration and emulation systems.

Such systems have not been able to handle behavioral constructs — those constructs not in the synthesizable subset of the Verilog and VHDL languages — before now, said Yukari Chin, marketing director for Axis. Users had to run the behavioral constructs on workstations, co-simulating alongside emulation.

Running synthesizable code on the emulator and linking that to behavioral code running on a connected workstation inevitably slowed the performance of emulation and the verification process, said Chin.

Now, the company has enhanced its ReConfigurable Computing (RCC) processors so that users can program behavioral constructs directly onto the RCC processors in the Xcite systems and speed verification.

"Our RCC technology has been able to handle gate and synthesizable RTL in the past; n ow we are announcing technology to handle behavioral constructs as well," said Chin. "The intent of this technology is to accelerate the portions of the verification environment that typically have to run on the workstation and communicate to the hardware such as testbenches and system tasks. By moving testbench functions like data generation and checking into our RCC hardware, we eliminate the communication overhead, thus improving overall performance."

Asynchronous nature

Because behavioral constructs are asynchronous, Chin said, they require the ability to dynamically schedule events without having to predetermine the execution timing of the design. That capability, according to Chin, has to be incorporated in an event-based system such as Xtreme and cannot be performed with cycle-based systems.

Chin said the Behavioral Processor accelerates constructs that have traditionally been bottlenecks in the chip verification process, such as triggering and monitoring, cache memory manageme nt and large arithmetic operations that are used in data path-intensive designs.

Chin said the Behavioral Processor technology is implemented through behavioral-level reconfigurable processors that are mapped directly onto FPGAs.

More support coming

This is the first of many technology announcements Axis expects to make supporting the Behavioral Processor technology, said Steve Wang, vice president of marketing for Axis.

Chin said that the technology has already been incorporated in the Xtreme tools and that customers are using it.

Those users adding behavioral constructs to the verification system, however, have to do so manually. Therefore, Axis is developing compiler tools for Verilog, VHDL, C/C++ and other popular behavioral languages. The tools will automatically program the behavioral constructs into the Xtreme system.

Chin said that in addition to accelerating behavioral constructs, the technology will accelerate testbench operations that drive signals and monitor a ctivities between a design and its test. In that vein, Axis has stepped up its relationship with testbench-generation tool company Verisity, announcing that the two companies are working to ensure that Verisity's SpecMan Elite testbench generator will work optimally with the Behavioral Processor technology.

Axis also plans to work with Synopsys to accelerate Vera testbench generation.

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