ARM, MathWorks combine tools to expand RISC cores in automotive systems
ARM, MathWorks combine tools to expand RISC cores in automotive systems
By Semiconductor Business News
September 13, 2001 (11:02 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010913S0025
AACHEN, Germany -- U.K-based ARM Ltd. today announced a collaborative project with the German subsidiary of The MathWorks Inc. in Aachen to jointly create a new software design environment for automotive systems using embedded RISC processor cores. The effort will combine the ARM Developer Suite (ADS) of code development tools, ARMulator instruction set simulator, and MathWorks' simulation and code generation systems, called Matlab/Simulink. The two companies said the combined environment will provide designers with a software emulation and simulation capability to complete development and validation of embedded systems before the hardware devices are available in silicon. The new capability will be demonstrated by The MathWorks GmbH subsidiary at the 59th International Motor Show, known as IAA, in Frankfurt, starting today. The IAA automotive trade show continues until Sept. 21. The collaborative project is aimed at firmly established ARM in the automotive industry, said Derek Morris, general manager of development systems for the Cambridge, England-based supplier of RISC cores for chip designs. ARM said the new development environment will help engineers detect problems in designs and coding, resulting in cost savings while speeding products to market.
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- MIPI SoundWire I3S Peripheral IP
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
- LPDDR6/5X/5 Controller IP
- Post-Quantum ML-KEM IP Core
Related News
- Panasonic Automotive Systems and Arm Partner to Standardize Software-Defined Vehicles
- Lexra, LSI Logic cores combine RISC and DSP functions
- syn1588® IP Cores: Setting the Gold Standard in Precision for Clock Synchronization
- Elevate the performance of your Automotive Application by integrating the IP cores of a 14-bit wideband Time-Interleaved Pipeline Data Converters
Latest News
- ADTechnology Collaborates with Euclyd to Develop Ultra-Efficient AI Chip for Datacenters
- SEALSQ and IC’Alps Unify Expertise to Deliver Integrated Post-Quantum Cybersecurity and Functional Safety for Autonomous Vehicles
- PUFsecurity’s PUFrt Anchors the Security of Silicon Labs’ SoC to Achieve the Industry’s First PSA Certified Level 4
- The next RISC-V processor frontier: AI
- PQShield joins EU-funded FORTRESS Project: Pioneering Quantum-Safe Secure Boot for Europe’s Digital Future