Security Protocol Engine IP

Compare 41 Security Protocol Engine IP from 14 vendors (1 - 10)

1G to 50G Single-Port MACsec Engine with xMII interface and TSN support
- MACsec solution for integration between MAC and PCS side supporting 1GbE to 50GbE rates with optional TSN support (including IEEE803.2br).
- For MACsec function integrates the MACsec-IP-161 with all IEEE MACsec standards supported. Optional Cisco ClearTags.
- Supplied with the Driver Development Kit to accelerate time to market. Rambus offers MACsec Toolkit for IEEE 802.1X key management
800G Multi-Channel MACsec Engine with TDM Interface
- Complete and fully compliant MACsec Packet Engine with classifier and transformation engines for rates of 100 to 800 Gbps, up to 64 channels, ready for FlexE
- All IEEE MACsec standards supported (including IEEE802.1AE-2018). Optional inclusion of Cisco extensions, IPsec ESP tunnel and transport mode with AES-GCM cipher
- Supplied with the Driver Development Kit to accelerate time to market. Rambus offers MACsec Toolkit for IEEE 802.1X key management
1G to 100G Single-Port MACsec Engine
- Complete HW/SW system.
- Driver Development Kit.
- High-speed MACsec Frame Engine
- Silicon-proven implementation
- Fast and easy to integrate into SoCs.
- Flexible layered design.
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
- Protocol aware IPsec, SSL, TLS, DTLS, 3GPP and MACsec Packet Engine with virtualization, caches classifier and Look-Aside interface for multi-core application processors
- 5-10 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, AMBA interface
- Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP, DPDK, Linux Crypto
Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
- Protocol aware IPsec, SSL, TLS, DTLS, 3GPP, MACsec packet engine with classifier and in-line interface for multi-core server processors
- 10-100 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, streaming and AMBA interface
- Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP.
Multi-Protocol Engine, Look-Aside, 1 Gbps
- Protocol-aware IPsec/TLS packet engine with Look-Aside interface for IoT.
- Up to 1 Gbps, lowest gate count in the industry, just 100K gates (ex AMBA interface).
- Supported by Driver Development Kit, QuickSec IPsec toolkit, Secure Boot Toolkit.
MACsec - Extreme-Speed Variant
- Moderate resource requirements
- Performance
- Standard Compliance
Media Access Control Security (MACSec)
- Up to four ports of concurrent traffic with an aggregate bandwidth of 100G are supported by one core (1x100G, 2x50G, 2x40G, 4x25G, 4x10G, 4x1G, 1x50G+2x25G)
- Line rate operation
- Flexible control/non-control port filtering
- Configurable number of Secure Channels (SCs) and Security Associations (SAs) per physical port
IPsec Engine
- Can aggregate several 10, 40 or 100 GBE link
- Throughput from 10 Gbps up to 100 Gbps
1.5Tbps MACsec Engine
- Throughput up to 1.5Tb
- ASIC and FPGA
- Multi-channel support for link aggregation or FlexE