SDA OCT IP
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6
IP
from 2 vendors
(1
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6)
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SDA OCT V3.0 Encoder and Decoder
- Low-power and low-complexity design
- AXI4-Stream data and configuration interfaces for a seamless integration
- Collection of statistical information
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I2C Slave Controller w/FIFO (AHB Bus)
- Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller w/FIFO (APB Bus)
- Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller w/FIFO (AXI Bus)
- I2C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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Hs-Mode I2C Controller - 3.4 Mbps, Slave w/FIFO
- 3.4 Mbps, Slave w/FIFO
- Implements Slave-only protocol for smaller VLSI footprint
- Supports four I2C bus speeds
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I2C Slave Controller with User Register Array / Memory / FIFO / AMBA Interface
- I2C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
- Autonomous I2C Slave Controller:
- 7- or 10-bit I2C Slave addressing, SCL Low Wait States
- Supports five I2C bus speeds:
