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MIL-STD-1553B IP

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  • DO-254 compliant MIL-STD-1553B IP core
    • 64K bytes internal static RAM with RAM Error Detection/Correction option
    • 16-bit time tag counters and clock sources for all terminals
    Block Diagram -- DO-254 compliant MIL-STD-1553B IP core
  • DO-254 MIL-STD-1553B Remote Terminal
    • Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
    • Fully Compliant to the MIL-STD-1553B, 21 September 1978 (with Notices 1 through 7)
    • Configurable number of Buses
    • Tested as specified in the MIL-HDBK-1553A, 1 November 1988 (AS4111 Rev. D)
    Block Diagram -- DO-254 MIL-STD-1553B Remote Terminal
  • AMBA interface for Actel MIL-STD-1553B Cores
    • AMBA AHB interface for Actel B1553BC/RT/BRM cores
    • AMBA AHB master interface
    • No block RAM needed
    • Low CPU overhead due to DMA transfers
  • Mil-Std-1553B/AS15531 Interface
    • General
    • Bus Controller
    • Remote Terminal
    • Bus Monitor
  • MIL1553B IP Core
    • High bit error reliability
    • Dual redundancy : Two buses supported
    • BC, RT and BM Modes are supported.
    Block Diagram -- MIL1553B IP Core
  • SpaceWire Routing Switch
    • Compliant with ECSS-E-ST-50-12C
    • Routing
    • Configuration port using the RMAP protocol (ECSS-E-ST-50-52C ) with optional support for the SpaceWire PnP protocol (currently SpaceWire-PnP Protocol Definition, Draft A Issue 2.1)
    • 2 - 31 ports individually configurable as SpaceWire, FIFO or AMBA ports
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