Inside Secure IP

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Compare 91 IP from 8 vendors (1 - 10)
  • Security Enclave IP based on RISC-V
    • Secure Boot
    • Firmware update in the field
    • Secure key storage
    Block Diagram -- Security Enclave IP based on RISC-V
  • Root of Trust eSecure module for SoC security
    • Secure Boot
    • Firmware update in the field
    • Secure key storage
    Block Diagram -- Root of Trust eSecure module for SoC security
  • 3DES ECB/CBC Accelerators
    • The 3DES-IP-16 (EIP-16) is IP for accelerating the AES symmetric cipher algorithm (FIPS-46/81 – SP800-IP-20), supporting single Des and triple DES in ECB, CBC, CFB and OFB modes up to 4 Gbps @ 800MHz.
    • Designed for fast integration, low gate count and full transforms, the 3DES-IP-16 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
    Block Diagram -- 3DES ECB/CBC Accelerators
  • AES-GCM Multi-channel upto 2Tbps Crypto Accelerator
    • EXAMPLE CONFIGURATIONS
    • The SafeXcel-IP-63 has a scalable number of processing pipes and channels. It is available in different configurations, suitable for different applications to meet different gate count and throughput objectives.
    • • EIP-63a-c17-r
    • o single pipe, 17 channels, register based (no memories)
  • Circuit Camouflage Technology
    • In summary, Inside Secure s Circuit Camouflage Technology together with Camo SmartFill:
    • Keeps designs secret from competitors and counterfeiters
    • Protects against state-of-the-art circuit extraction attacks
    • Is applicable to any CMOS process and any digital design
    Block Diagram -- Circuit Camouflage Technology
  • Poly1305 Crypto Accelerator
    • Wide bus interface (128-bit data, 128-bit keys, 135-bit digest) or 32-bit register interface
    • Key size: 128 bits
    • Includes initialization stage
    • Supports continuation mode
    • Fully synchronous design
    Block Diagram -- Poly1305 Crypto Accelerator
  • ChaCha20 Accelerators
    • The ChaCha-IP-13 (EIP-13) is an IP solution for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8 Gbps @ 300MHz.
    • Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- ChaCha20 Accelerators
  • MACsec software toolkit
    • IEEE 802.1AE (data plane)
    • IEEE 802.1x -2010 (control plane)
    • MKA (MACsec Key Agreement)
    • Network Announcements
  • 3GPP ZUC Accelerators
    • The ZUC-IP-48 (EIP-48) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI.
    • Designed for fast integration, low gate count and full transforms, the ZUC-IP-48 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
    Block Diagram -- 3GPP ZUC Accelerators
  • SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
    • The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz.
    • Designed for fast integration, low gate count and full transforms, the HASH-IP-57 accelerators provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
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Semiconductor IP