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Search (238)
Compare 238 IP from 53 vendors (1 - 10)
  • 400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
    • Lowest latency in market
    • Ultra low latency FEC and SERDES combo
    • Provides sub 10ns combined latency
  • 50G Ethernet PCS/MAC/FEC
    • Features
    • Logic and power efficient KP4 FEC engine with full warnings and alarms
    • Integrated 64B/66B and 256B/257B encoder for area efficiency
    • Built-in loopbacks and PRBS generators/ checkers for test and diagnostics
  • Reed Solomon Decoder and Encoder FEC
    • High performance Reed Solomon IP Core (Encoder and Decoder)
    • Supports error and erasure decoding
    • Parameterized codeword length
  • 25Gbps Ethernet and CPRI-10 FEC Layer IP Core
    • Proven IP reduces development time and risk
    • Upgrade process as the standard evolves
    • Supports both 25GBASE-KR and 25GBASE-CR PMD interfaces
    Block Diagram -- 25Gbps Ethernet and CPRI-10 FEC Layer IP Core
  • Generic Polar FEC Encoder and Decoder
    • Fully-pipelined architecture
    • Support for systematic and non-systematic encoding
    • Support for coded block lengths of up to 1024 bits
    • Support for a wide variety of
  • JESD204 CYCLIC FEC IIP
    • Compliant with JESD204 specification JESD204C.
    • Supports Full JESD204C FEC functionality.
    • This FEC(Forward Error correction) methodology implements the (2074, 2048) binary cyclic code is shortened from the cyclic Fire code (8687, 8661).
    • Supports FEC of 26 bits parity bits.
    Block Diagram -- JESD204 CYCLIC FEC IIP
  • FEC RS (544,514) IIP
    • Compliant with CPRI Specification V7.0, IEEE Standard 802.3.2018 Ethernet specification and JESD204D Specification.
    • Supports full FEC functionality.
    • Supports Reed Solomon (544,514) FEC, 10-bit symbols.
    • Supports different input and output data widths of multiples of 10-bits.
    Block Diagram -- FEC RS (544,514) IIP
  • FEC RS (528,514) IIP
    • Compliant with CPRI Specification V7.0, IEEE Standard 802.3.2018 Ethernet specification and JESD204D Specification.
    • Supports full FEC functionality.
    • Supports Reed Solomon (528,514) FEC, 10-bit symbols.
    • Supports different input and output data widths of multiples of 10-bits.
    Block Diagram -- FEC RS (528,514) IIP
  • FEC RS (255,251) IIP
    • HDMI specification 2.1/2.1a and Scalabale Low Voltage Signaling with Embedded Clock (SLVS_EC) compliant.
    • Supports full FEC functionality.
    • Supports Reed Solomon (255,251) FEC, 8-bit symbols.
    • Supports the input and output data widths of multiples of 8-bit.
    Block Diagram -- FEC RS (255,251) IIP
  • FEC RS (254,250) IIP
    • VESA Display Port version 1.4/2.0/2.1 compliant.
    • Supports full FEC functionality.
    • Supports Reed Solomon (254,250) FEC, 10-bit symbols.
    • Supports the input and output data widths of multiples of 10-bit.
    Block Diagram -- FEC RS (254,250) IIP
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