Certus IP
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Compare
31
IP
from 2 vendors
(1
-
10)
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LVDS RX & TX IOs in multiple foundry technology
- LVDS TX
- LVDS RX
-
Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
- I2C Open-drain
- Physical Features
-
Secure Digital I/O offerings
- Secure Digital
- Physical Features
-
RGMII I/O offerings
- RGMII
- Physical Features
-
A 65nm Wirebond IO library with 2.5V GPIO, LVDS TX & RX and 2.5V analog / RF
- GPIO:
- LVDS TX & RX
- ANALOG / RF
- Physical Attributes
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A 180nm Flip-Chip IO library with 1.2-1.8V GPIO, 1.8V & 5V analog/RF, 20-36V ultra-low leakage low-cap HV analog and OTP program cell
- GPIO:
- ANALOG
- OTP Programming Cell
- Physical Attributes
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A 130nm Wirebond IO library with 3.3V GPIO, LVDS TX & RX, 3.3V I2C open-drain, analog cell and OTP program cell
- GPIO:
- I2C / SMBUS Open-Drain I/O:
- LVDS
- ANALOG
-
A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell
- GPIO:
- I2C / SVID Open-Drain I/O:
- ANALOG
- OTP Programming Cell
-
28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- General-Purpose IO
- I2C/SMBUS Open Drain I/O
- ANALOG
- HDMI & LVDS protection Macros
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A 28nm 1.8V-3.3V Fail-Safe General-Purpose IO & OSC
- Fail-Safe GPIO in TSMC 28nm process technology
- Physical features
- This library also features a 33MHz OSC (3.3V).
