Aes-xts IP

Compare 43 IP from 15 vendors (1 - 10)

AES-XTS, Advanced Encryption Standard (256-bit key), XTS mode IP Core
- Moderate resource requirements: The entire XIP1183H requires 28456 Adaptive Lookup Modules (ALMs) (Intel Agilex F), and does not require any multipliers or DSPBlocks. Contact sales@xiphera.com for ASIC resource requirements.
- Performance: XIP1183H achieves an impressive throughput in the tens of Gbps range, for example 43.48+ Gbps in Xilinx Versal Prime.
- Standard Compliance: XIP1183H is compliant with both the Advanced Encryption Algorithm (AES) standard, and the XTS standard.
- Optional Ciphertext stealing support as defined in IEEE Std 1619-2018.
AES-XTS, Advanced Encryption Standard (256-bit key), XTS mode IP Core
- Moderate resource requirements
- Performance
- Standard Compliance
AES-XTS encryption/decryption IP
- High Performance and Low Latency industry standard encryption / decryption
- Independent non-blocking encryption and decryption channels
- 128b and 256b keys supported
AES-XTS MULTI-BOOSTER
- AMBA interface
- Supported key sizes: 128, 192 and 256 bits
- Compliant with NIST SP 800-38e
- Tunable performance (area and performance) - From low area to high-performance
AES-XTS Storage Encrypt/Decrypt Engine
- Encrypts and decrypts using the AES Rijndael Block Cipher Algorithm
- Implemented according to the IEEE P1619™/D16 standard
- NIST-Validated
- Capable of processing 128 bits/cycle
AES-XTS Multi-Booster
- ASIC and FPGA
- High throughput:
- Scalable solution
- Supports 128-bit & 256-bit key
AES Core XTS
- Complies with IEEE 1619-2007 and NIST SP800-38E standards
- Performance selectable to meet or exceed USB 3.0 and SATA 3.0 (6 Gbps), even on low cost FPGA families
- Low area, implementation of AES-XTS suitable for data storage applications.
- Based on the NIST validated (Cert #953) AES-G3 implementation of FIPS 197 (November 2001) Advanced Encryption Standard
High Performance AES-XTS/ECB Core
- Scalable high-performance & low latency AES-XTS/ECB core with efficient support for varied networking traffic
- Standards compliant: NIST SP800-90-38E and IEEE Std 1619-2018
- Scalable throughput from 128 to 4096 bits/cycle (up to 4Tbps @ 1GHz)
- Encrypt/Decrypt/Bypass
Ultra High Performance AES-XTS/ECB Core
- High performance & low latency core with efficient support for varied network traffic
- Standards compliant: AES-GCM/GMAC, AES-CTR; AES-CTR
- NIST FIPS 140-3 security certification ready. Passed NIST CAVP validation.
- Customer configurable
- Scalable architecture
High-Performance AES-XTS/ECB IP
- Scalable high-performance & low latency AES-XTS/ECB cores with efficient support for varied networking traffic
- Standards compliant: NIST SP800-90-38E and IEEE Std 1619-2018
- Two customer configurable IP cores with scalable throughput, 64 bits/cycle, 128 bits/cycle (up to 128 Gbps @ 1 GHz), 256 to 4096 bits/cycle (up to 4 Tbps @ 1 GHz)
- Encrypt/Decrypt/Bypass

AES-XTS IP