Security IP for TSMC

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Compare 39 Security IP for TSMC from 8 vendors (1 - 10)
  • 3GPP Kasumi Accelerators
    • Wide bus interface (64-bit data, 128-bit keys) or 32-bit register interface.
    • Includes key scheduling hardware.
    • Modes Kasumi
    • Algorithms f8 and f9.
    • Fully synchronous design.
    • Low Speed, High Speed versions.
    Block Diagram -- 3GPP Kasumi Accelerators
  • 802.11i CCMP/TKIP IP Core
    • Implementation of the WLAN security standard (802.11i) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and message authentication with the CCMP protocol and RC4/”Michael” cipher for the TKIP.
    • The WPA3 core is tuned for high data rate 802.11i applications (up to 2 Gbps for the CCMP protocol for 802.11n/802.11ac).
    Block Diagram -- 802.11i CCMP/TKIP IP Core
  • Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
    • One input word per clock without any backpressure
    • Design can switch stream, algorithm, mode, key and/or direction every clock cycle
    • GCM: throughput is solely determined by the data width, data alignment and clock frequency
    • XTS: block processing rate may be limited by the number of configured tweak encryption & CTS cores; a configuration allowing 1 block/clock is available
    Block Diagram -- Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
  • RSA/ECC Public Key Accelerators with TRNG and AHB
    • Up to 4160-bit modulus size for RSA & 768-bit modulus for prime field ECC operations
    • Public key signature generation, verification and key negotiation with little involvement of host
    • NIST CAVP compliant for FIPS 140-3
    Block Diagram -- RSA/ECC Public Key Accelerators with TRNG and AHB
  • Small RSA/ECC Public Key Accelerators
    • The PKA-IP-28 is a family of Public Key Accelerator IP cores designed for full scalability and an optimal “performance over gate count” deployment.
    • Proven in silicon, the PKA-IP-28 public key accelerator addresses the unique needs of semiconductor OEMs and provides a reliable and cost-effective solution that is easy to integrate into SoC designs.
    Block Diagram -- Small RSA/ECC Public Key Accelerators
  • ChaCha20 Accelerators
    • The ChaCha-IP-13 (EIP-13) is an IP solution for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8 Gbps @ 300MHz.
    • Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- ChaCha20 Accelerators
  • ARC4 Stream Cipher Accelerators
    • The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600MHz.
    • Designed for fast integration, low gate count and full transforms, the ARC4-IP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- ARC4 Stream Cipher Accelerators
  • Poly1305 Crypto Accelerator
    • Wide bus interface (128-bit data, 128-bit keys, 135-bit digest) or 32-bit register interface
    • Key size: 128 bits
    • Includes initialization stage
    • Supports continuation mode
    • Fully synchronous design
    Block Diagram -- Poly1305 Crypto Accelerator
  • SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
    • HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), up to 8 Gbps.
    • Designed for fast integration, low gate count and full transforms, the HMAC-IP-59 accelerators provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
  • SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
    • The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz.
    • Designed for fast integration, low gate count and full transforms, the HASH-IP-57 accelerators provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
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