RSA/ECC Public Key Accelerators with TRNG and AHB

Overview

The PKA-IP-150 is a family of Public Key Accelerators (PKA) IP cores designed for full scalability and an optimal “performance over gate count” deployment. Silicon-proven, the PKA-IP-150 address the unique high-speed, high-security requirements of semiconductor OEMs and provides a reliable and cost-effective IP solution that is easy to integrate into SoC designs. The PKA-IP-150 can be deployed in any semiconductor design that requires high performance key exchange or key generation with low power consumption, and can be provided with or without protection against side channel attacks.

The PKA-IP-150 public key accelerator combines the PKA-IP-28 and TRNG-IP-76 with an AMBA interface such as AXI or AHB.

Key Features

  • Up to 4160-bit modulus size for RSA & 768-bit modulus for prime field ECC operations
  • Public key signature generation, verification and key negotiation with little involvement of host
  • NIST CAVP compliant for FIPS 140-3

Benefits

  • Complete HW/SW system.
  • High-speed Public Key processing solution.
  • Silicon-proven implementation.
  • Fast and easy to integrate into SoCs.
  • Flexible layered design.
  • Software support available:
  • Generic driver libraries for PKA, TRNG and interrupt controller
  • High level Public Key operations through a library
  • Complete range of configurations.
  • World-class technical support.

Block Diagram

RSA/ECC Public Key Accelerators with TRNG and AHB Block Diagram

Deliverables

  • Documentation
    • Hardware Reference and Programmer Manual
    • Integration Manual
    • Verification Specification
    • Operations Manual
  • Synthesizable Verilog RTL source code
  • Self-checking RTL test bench, including test vectors and expected result vectors
  • Simulation scripts
  • Synthesis scripts
  • Configurations:
  • Many different configurations available:
    • Side channel protection
    • ROM or RAM
    • PLB or asynchronous AHB or APB interface instead of the synchronous AHB or AXI interface.
    • Gate counts range from : 33-340k gates, depending on number of modules
    • Up to 900 MHz
  • For more information about this product or the all the different configurations, please contact Rambus: https://www.rambus.com/contact

Technical Specifications

Foundry, Node
Any
Maturity
Silicon Proven
Availability
Now
TSMC
Silicon Proven: 7nm , 16nm , 28nm , 40nm G
×
Semiconductor IP