SD/eMMC Controller IP for TSMC
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SATA 6G PHY in TSMC (40nm, 28nm, 16nm, 12nm, N7)
- Compliant with SATA/eSATA v3.3, AHCI v1.3 and SATA PIPE v4.3 specifications
- AMBA 2.0 AHB and AMBA 3 AXI subsystem interfaces
- AMBA 4 AXI and ACE-Lite bus interfaces
- Memory data protection and memory address parity protection
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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SATA 6G PHY
- ? 6-Gbps transmission rate through standard SATA cable
- ? Spread-spectrum clock (SSC) generation and absorption
- ? Programmable down-spread (+4,980 ppm through -4,980 ppm)
- ? Fully clock-forwarded transceiver interface, configurable using soft PMA layer above hard macro PHY
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled