Ultra High Performance 64-bit RISC-V Embedded Processor
Overview
The S7 Series offers a 64-bit embedded processor targeting high-performance, real-time applications that require 64-bit memory addressability. The S7 core has a superscalar 8-stage in-order pipeline.
Key Features
- 7 core architectural features
- RV64GCV capable core
- Dual Issue, in-order 8 stage Harvard Pipeline
- Performance and Area
- DMIPS – 2.5 DMIPS/MHz
- Coremark – 5.1 CoreMarks/MHz
- Core Area is only 30% larger than equivalent 3/5 Series Core
- Very flexible memory system
- Optional I$ and D$
- Optional I and D TCM interfaces
- Optional Fast IO (FIO) for low latency, high-bandwidth, memory mapped IO
- Functional Safety and Security and Real Time features
- SECDED ECC on all L1 and L2 memories
- Programmatically clear and/or disable dynamic branch prediction for deterministic execution and enhanced security
- Multi-Core Capable with Coherency and optional L2
Applications
- SSD Controllers
- IoT Edge Computing
- Wireless Radios
- Automotive/Industrial
Deliverables
- RTL Evaluation
- Test Bench RTL
- Software Development Kit
- FPGA Bitstream
- Documentation
Technical Specifications
Maturity
Now
Related IPs
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