Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HPC process
Overview
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35).
Technical Specifications
Foundry, Node
UMC 28nm HPC
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPM
,
28nm
LP
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- CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process