SMIC 65nm LL SSTL_18/SSTL_2/LPDDR/LVTTL COMBO interface for DRAM application
Key Features
- SSTL_18/SSTL_2/LPDDR/LVTTL COMBO interface for DRAM application;
- Support ONFI3.1/Toggel 2.0 interface application;
- SMIC 65nm Logic Low Leakage Salicide 1.2V/1.8V/2.5V Process;
- Cell Size (Width * height) 35um * 325um with DUP stagger bonding pads;
- Work voltage: 1.8V/2.5V/3.3V;
- Programmable driven-strength, programmable ODT, optional pullup,pulldown resistor; support data rate up to 667Mbps;
- Suitable for 7,8,9 and 10 layers application;
Technical Specifications
Foundry, Node
SMIC 65nm LL
Maturity
In Production
SMIC
In Production:
65nm
LL
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