SMIC 55nm LL SSTL_18/ SSTL_2/ LPDDR/ LVTTL COMBO interface for DRAM application

Key Features

• SSTL_18/ SSTL_2/ LPDDR/ LVTTL COMBO interface for DRAM application;
• 2).Suppport ONFI3.1/Toggle2.0 interface;
• 3).SMIC 55nm Logic Low Leakage Salicide 1.2V/1.8V/2.5V Process;
• 4).Cell Size (Width * height) 35um * 325um with DUP stagger bonding pads;
• 5).Work voltage: 1.8V/2.5V/3.3V;
• 6).Programmable driven-strength; programmable ODT, optional pullup,pulldown resistor; support data rate up to 667Mbps;
• 7).Suitable for 7, 8, 9 and 10 layers application;

Technical Specifications