SERDES IP 16Gbps per channel
Key Features
- 8 channel SERDES (TXRX), operating at data rates from 1.5Gbps to 16Gbps per channel
- Provides interfaces for multiple protocols
- TX with serial output driver, with calibrated on-chip termination resistor
- 5-tap TX de-emphasis
- Spread Spectrum Clocking (SSC)
- Serial input receiver with calibrated on-chip termination resistor
- AFE with Adaptive Continuous Time Linear Equalizer (ACTLE)
- Decision Feedback Equalization (DFE)
- Eye monitor
- Serial and parallel loopbacks
- Loss of signal detector
- AC JTAG
- 2 power supplies of 0.8V and 1.2V
Benefits
- 8 channel, multi-protocol SERDES that operates at speeds up to 16Gbps per channel
- It supports a variety of industry standards such as PCIe4/3/2/1, USB3.x, 10GBASE-KR, 10GBASE-X, SATA3/2/1, XAUI and RXAUI.
- Process nodes: 55/65nm, 40nm, 28nm, 16nm
Deliverables
- Encrypted Verilog/SystemVerilog RTL, or post-synthesis netlist
- Synthesis and STA scripts
- GDSII for hard macro
- User guide documents
- SV/UVM Verification suite with BFM
Technical Specifications
Foundry, Node
55/65nm, 40nm, 28nm, 16nm
Maturity
In Production
Availability
Available
Related IPs
- LVDS serdes 28:4 channel compression TX 20-170Mhz
- LVDS serdes 4:28 channel decompression RX 8-150Mhz
- Dual FPD-link Transmitter, 30/24-bits color, 40-170 Mhz (SVGA/HDTV@120hz) - with 2 independant links capability LVDS SerDes 70:10 channel compression
- Dual FPD-link Transmitter, 30/24-bits color, 40-170 Mhz (SVGA/HDTV@120Hz) - with 2 independant links capability LVDS SerDes 70:10 channel compression
- FPD-link, 30-Bit Color LVDS Receiver, 40-170Mhz (Full-HDTV @60Hz) LVDS SerDes 5:35 channel decompression with deskew capability
- Dual FPD-link, 30-Bit Color LVDS Receiver, 40-170Mhz (Full-HDTV @120Hz) LVDS SerDes 10:70 channel decompression with deskew capability